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Clip number :   0IJ1EA
Direct URL :   https://www.heypasteit.com/clip/0IJ1EA
Date :   2017-11-24 20:13:07 GMT
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	/*
 * Copyright (C) 2015 Jens Kuske <[email protected]>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-h3-ccu.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-h3-ccu.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	sound_hdmi: sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,name = "allwinner,hdmi";
		simple-audio-card,mclk-fs = <256>;
		status = "disabled";

		simple-audio-card,codec {
			sound-dai = <&hdmi>;
		};

		simple-audio-card,cpu {
			sound-dai = <&i2s2>;
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		osc24M: osc24M_clk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
			clock-output-names = "osc24M";
		};

		osc32k: osc32k_clk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
			clock-output-names = "osc32k";
		};

		iosc: internal-osc-clk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <16000000>;
			clock-accuracy = <300000000>;
			clock-output-names = "iosc";
		};
	};

	de: display-engine {
		compatible = "allwinner,sun8i-h3-display-engine";
		allwinner,pipelines = <&mixer0>,
				      <&mixer1>;
		status = "disabled";
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		display_clocks: [email protected] {
			/* compatible is in per SoC .dtsi file */
			reg = <0x01000000 0x100000>;
			clocks = <&ccu CLK_BUS_DE>,
				 <&ccu CLK_DE>;
			clock-names = "bus",
				      "mod";
			resets = <&ccu RST_BUS_DE>;
			#clock-cells = <1>;
			#reset-cells = <1>;
			assigned-clocks = <&ccu CLK_DE>;
			assigned-clock-parents = <&ccu CLK_PLL_DE>;
			assigned-clock-rates = <432000000>;
		};

		hdmi: [email protected] {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun8i-h3-dw-hdmi";
			reg = <0x01ee0000 0x10000>,
			      <0x01ef0000 0x10000>;
			reg-io-width = <1>;
			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI>,
				 <&ccu CLK_HDMI_DDC>;
			clock-names = "iahb", "isfr", "ddc";
			resets = <&ccu RST_BUS_HDMI0>, <&ccu RST_BUS_HDMI1>;
			reset-names = "hdmi", "ddc";
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				hdmi_in: [email protected] {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					hdmi_in_tcon0: [email protected] {
						reg = <0>;
						remote-endpoint = <&tcon0_out_hdmi>;
					};
				};

				hdmi_out: [email protected] {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;
				};
			};
		};

		mixer0: [email protected] {
			compatible = "allwinner,sun8i-h3-de2-mixer0";
			reg = <0x01100000 0x100000>;
			clocks = <&display_clocks CLK_BUS_MIXER0>,
				 <&display_clocks CLK_MIXER0>;
			clock-names = "bus",
				      "mod";
			resets = <&display_clocks RST_MIXER0>;
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				mixer0_out: [email protected] {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					mixer0_out_tcon0: [email protected] {
						reg = <0>;
						remote-endpoint = <&tcon0_in_mixer0>;
					};

					mixer0_out_tcon1: [email protected] {
						reg = <1>;
						remote-endpoint = <&tcon1_in_mixer0>;
					};
				};
			};
		};

		mixer1: [email protected] {
			compatible = "allwinner,sun8i-h3-de2-mixer1";
			reg = <0x01200000 0x100000>;
			clocks = <&display_clocks CLK_BUS_MIXER1>,
				 <&display_clocks CLK_MIXER1>;
			clock-names = "bus",
				      "mod";
			/* resets is in per SoC .dtsi file */
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				mixer1_out: [email protected] {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					mixer1_out_tcon0: [email protected] {
						reg = <0>;
						remote-endpoint = <&tcon0_in_mixer1>;
					};

					mixer1_out_tcon1: [email protected] {
						reg = <1>;
						remote-endpoint = <&tcon1_in_mixer1>;
					};
				};
			};
		};

		syscon: [email protected] {
			compatible = "allwinner,sun8i-h3-system-controller",
				"syscon";
			reg = <0x01c00000 0x1000>;
		};

		dma: [email protected] {
			compatible = "allwinner,sun8i-h3-dma";
			reg = <0x01c02000 0x1000>;
			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_DMA>;
			resets = <&ccu RST_BUS_DMA>;
			#dma-cells = <1>;
		};

		tcon0: [email protected] {
			compatible = "allwinner,sun8i-h3-tcon";
			reg = <0x01c0c000 0x1000>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_TCON0>,
				 <&ccu CLK_TCON0>;
			clock-names = "ahb",
				      "tcon-ch1";
			resets = <&ccu RST_BUS_TCON0>;
			reset-names = "lcd";
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				tcon0_in: [email protected] {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					tcon0_in_mixer0: [email protected] {
						reg = <0>;
						remote-endpoint = <&mixer0_out_tcon0>;
					};

					tcon0_in_mixer1: [email protected] {
						reg = <1>;
						remote-endpoint = <&mixer1_out_tcon0>;
					};
				};

				tcon0_out: [email protected] {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					tcon0_out_hdmi: [email protected] {
						reg = <1>;
						remote-endpoint = <&hdmi_in_tcon0>;
					};
				};
			};
		};

		tcon1: lcd[email protected] {
			compatible = "allwinner,sun8i-h3-tcon";
			reg = <0x01c0d000 0x1000>;
			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_TCON1>,
				 <&ccu CLK_TVE>;
			clock-names = "ahb",
				      "tcon-ch1";
			resets = <&ccu RST_BUS_TCON1>;
			reset-names = "lcd";
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				tcon1_in: [email protected] {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					tcon1_in_mixer0: [email protected] {
						reg = <0>;
						remote-endpoint = <&mixer0_out_tcon1>;
					};

					tcon1_in_mixer1: [email protected] {
						reg = <1>;
						remote-endpoint = <&mixer1_out_tcon1>;
					};
				};

				tcon1_out: [email protected] {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;
				};
			};
		};

		mmc0: [email protected] {
			/* compatible and clocks are in per SoC .dtsi file */
			reg = <0x01c0f000 0x1000>;
			resets = <&ccu RST_BUS_MMC0>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		mmc1: [email protected] {
			/* compatible and clocks are in per SoC .dtsi file */
			reg = <0x01c10000 0x1000>;
			resets = <&ccu RST_BUS_MMC1>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		mmc2: [email protected] {
			/* compatible and clocks are in per SoC .dtsi file */
			reg = <0x01c11000 0x1000>;
			resets = <&ccu RST_BUS_MMC2>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		usb_otg: [email protected] {
			compatible = "allwinner,sun8i-h3-musb";
			reg = <0x01c19000 0x400>;
			clocks = <&ccu CLK_BUS_OTG>;
			resets = <&ccu RST_BUS_OTG>;
			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "mc";
			phys = <&usbphy 0>;
			phy-names = "usb";
			extcon = <&usbphy 0>;
			status = "disabled";
		};

		usbphy: [email protected] {
			compatible = "allwinner,sun8i-h3-usb-phy";
			reg = <0x01c19400 0x2c>,
			      <0x01c1a800 0x4>,
			      <0x01c1b800 0x4>,
			      <0x01c1c800 0x4>,
			      <0x01c1d800 0x4>;
			reg-names = "phy_ctrl",
				    "pmu0",
				    "pmu1",
				    "pmu2",
				    "pmu3";
			clocks = <&ccu CLK_USB_PHY0>,
				 <&ccu CLK_USB_PHY1>,
				 <&ccu CLK_USB_PHY2>,
				 <&ccu CLK_USB_PHY3>;
			clock-names = "usb0_phy",
				      "usb1_phy",
				      "usb2_phy",
				      "usb3_phy";
			resets = <&ccu RST_USB_PHY0>,
				 <&ccu RST_USB_PHY1>,
				 <&ccu RST_USB_PHY2>,
				 <&ccu RST_USB_PHY3>;
			reset-names = "usb0_reset",
				      "usb1_reset",
				      "usb2_reset",
				      "usb3_reset";
			status = "disabled";
			#phy-cells = <1>;
		};

		ehci0: [email protected] {
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			reg = <0x01c1a000 0x100>;
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
			resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
			status = "disabled";
		};

		ohci0: [email protected] {
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			reg = <0x01c1a400 0x100>;
			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
				 <&ccu CLK_USB_OHCI0>;
			resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
			status = "disabled";
		};

		ehci1: [email protected] {
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			reg = <0x01c1b000 0x100>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>;
			resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
			phys = <&usbphy 1>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci1: [email protected] {
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			reg = <0x01c1b400 0x100>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>,
				 <&ccu CLK_USB_OHCI1>;
			resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
			phys = <&usbphy 1>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci2: [email protected] {
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			reg = <0x01c1c000 0x100>;
			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>;
			resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
			phys = <&usbphy 2>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci2: [email protected] {
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			reg = <0x01c1c400 0x100>;
			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>,
				 <&ccu CLK_USB_OHCI2>;
			resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
			phys = <&usbphy 2>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci3: [email protected] {
			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
			reg = <0x01c1d000 0x100>;
			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>;
			resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
			phys = <&usbphy 3>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci3: [email protected] {
			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
			reg = <0x01c1d400 0x100>;
			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>,
				 <&ccu CLK_USB_OHCI3>;
			resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
			phys = <&usbphy 3>;
			phy-names = "usb";
			status = "disabled";
		};

		ccu: [email protected] {
			/* compatible is in per SoC .dtsi file */
			reg = <0x01c20000 0x400>;
			clocks = <&osc24M>, <&osc32k>;
			clock-names = "hosc", "losc";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		pio: [email protected] {
			/* compatible is in per SoC .dtsi file */
			reg = <0x01c20800 0x400>;
			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <3>;
			interrupt-controller;
			#interrupt-cells = <3>;

			emac_rgmii_pins: emac0 {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4",
				       "PD5", "PD7", "PD8", "PD9", "PD10",
				       "PD12", "PD13", "PD15", "PD16", "PD17";
				function = "emac";
				drive-strength = <40>;
			};

			i2c0_pins: i2c0 {
				pins = "PA11", "PA12";
				function = "i2c0";
			};

			i2c1_pins: i2c1 {
				pins = "PA18", "PA19";
				function = "i2c1";
			};

			i2c2_pins: i2c2 {
				pins = "PE12", "PE13";
				function = "i2c2";
			};

			i2s0_pins: i2s0 {
				pins = "PA18", "PA19", "PA20", "PA21";
				function = "i2s0";
			};

			i2s1_pins: i2s1 {
				pins = "PG10", "PG11", "PG12", "PG13";
				function = "i2s1";
			};

			mmc0_pins_a: [email protected] {
				pins = "PF0", "PF1", "PF2", "PF3",
				       "PF4", "PF5";
				function = "mmc0";
				drive-strength = <30>;
				bias-pull-up;
			};

			mmc0_cd_pin: [email protected] {
				pins = "PF6";
				function = "gpio_in";
				bias-pull-up;
			};

			mmc1_pins_a: [email protected] {
				pins = "PG0", "PG1", "PG2", "PG3",
				       "PG4", "PG5";
				function = "mmc1";
				drive-strength = <30>;
				bias-pull-up;
			};

			mmc2_8bit_pins: mmc2_8bit {
				pins = "PC5", "PC6", "PC8",
				       "PC9", "PC10", "PC11",
				       "PC12", "PC13", "PC14",
				       "PC15", "PC16";
				function = "mmc2";
				drive-strength = <30>;
				bias-pull-up;
			};

			spdif_tx_pins_a: [email protected] {
				pins = "PA17";
				function = "spdif";
			};

			spi0_pins: spi0 {
				pins = "PC0", "PC1", "PC2", "PC3";
				function = "spi0";
			};

			spi1_pins: spi1 {
				pins = "PA15", "PA16", "PA14", "PA13";
				function = "spi1";
			};

			uart0_pins_a: [email protected] {
				pins = "PA4", "PA5";
				function = "uart0";
			};

			uart1_pins: uart1 {
				pins = "PG6", "PG7";
				function = "uart1";
			};

			uart1_rts_cts_pins: uart1_rts_cts {
				pins = "PG8", "PG9";
				function = "uart1";
			};

			uart2_pins: uart2 {
				pins = "PA0", "PA1";
				function = "uart2";
			};

			uart3_pins: uart3 {
				pins = "PA13", "PA14";
				function = "uart3";
			};

			uart3_rts_cts_pins: uart3_rts_cts {
				pins = "PA15", "PA16";
				function = "uart3";
			};

		};

		[email protected] {
			compatible = "allwinner,sun4i-a10-timer";
			reg = <0x01c20c00 0xa0>;
			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc24M>;
		};

		emac: [email protected] {
			compatible = "allwinner,sun8i-h3-emac";
			syscon = <&syscon>;
			reg = <0x01c30000 0x10000>;
			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			resets = <&ccu RST_BUS_EMAC>;
			reset-names = "stmmaceth";
			clocks = <&ccu CLK_BUS_EMAC>;
			clock-names = "stmmaceth";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			mdio: mdio {
				#address-cells = <1>;
				#size-cells = <0>;
				int_mii_phy: [email protected] {
					compatible = "ethernet-phy-ieee802.3-c22";
					reg = <1>;
					clocks = <&ccu CLK_BUS_EPHY>;
					resets = <&ccu RST_BUS_EPHY>;
				};
			};
		};

		spi0: [email protected] {
			compatible = "allwinner,sun8i-h3-spi";
			reg = <0x01c68000 0x1000>;
			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
			clock-names = "ahb", "mod";
			dmas = <&dma 23>, <&dma 23>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <&spi0_pins>;
			resets = <&ccu RST_BUS_SPI0>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi1: [email protected] {
			compatible = "allwinner,sun8i-h3-spi";
			reg = <0x01c69000 0x1000>;
			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
			clock-names = "ahb", "mod";
			dmas = <&dma 24>, <&dma 24>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <&spi1_pins>;
			resets = <&ccu RST_BUS_SPI1>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		wdt0: [email protected] {
			compatible = "allwinner,sun6i-a31-wdt";
			reg = <0x01c20ca0 0x20>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
		};

		spdif: [email protected] {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun8i-h3-spdif";
			reg = <0x01c21000 0x400>;
			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
			resets = <&ccu RST_BUS_SPDIF>;
			clock-names = "apb", "spdif";
			dmas = <&dma 2>;
			dma-names = "tx";
			status = "disabled";
		};

		pwm: [email protected] {
			compatible = "allwinner,sun8i-h3-pwm";
			reg = <0x01c21400 0x8>;
			clocks = <&osc24M>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		i2s0: [email protected] {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun8i-h3-i2s";
			reg = <0x01c22000 0x400>;
			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
			clock-names = "apb", "mod";
			dmas = <&dma 3>, <&dma 3>;
			resets = <&ccu RST_BUS_I2S0>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2s1: [email protected] {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun8i-h3-i2s";
			reg = <0x01c22400 0x400>;
			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
			clock-names = "apb", "mod";
			dmas = <&dma 4>, <&dma 4>;
			resets = <&ccu RST_BUS_I2S1>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2s2: [email protected] {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun8i-h3-i2s";
			reg = <0x01c22800 0x400>;
			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
			clock-names = "apb", "mod";
			dmas = <&dma 27>;
			resets = <&ccu RST_BUS_I2S2>;
			dma-names = "tx";
			status = "disabled";
		};

		codec: [email protected] {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun8i-h3-codec";
			reg = <0x01c22c00 0x400>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
			clock-names = "apb", "codec";
			resets = <&ccu RST_BUS_CODEC>;
			dmas = <&dma 15>, <&dma 15>;
			dma-names = "rx", "tx";
			allwinner,codec-analog-controls = <&codec_analog>;
			status = "disabled";
		};

		uart0: [email protected] {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c28000 0x400>;
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART0>;
			resets = <&ccu RST_BUS_UART0>;
			dmas = <&dma 6>, <&dma 6>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		uart1: [email protected] {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c28400 0x400>;
			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART1>;
			resets = <&ccu RST_BUS_UART1>;
			dmas = <&dma 7>, <&dma 7>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		uart2: [email protected] {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c28800 0x400>;
			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART2>;
			resets = <&ccu RST_BUS_UART2>;
			dmas = <&dma 8>, <&dma 8>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		uart3: [email protected] {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c28c00 0x400>;
			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART3>;
			resets = <&ccu RST_BUS_UART3>;
			dmas = <&dma 9>, <&dma 9>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		i2c0: [email protected] {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x01c2ac00 0x400>;
			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C0>;
			resets = <&ccu RST_BUS_I2C0>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c0_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c1: [email protected] {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x01c2b000 0x400>;
			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C1>;
			resets = <&ccu RST_BUS_I2C1>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c1_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c2: [email protected] {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x01c2b400 0x400>;
			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C2>;
			resets = <&ccu RST_BUS_I2C2>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c2_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		gic: [email protected] {
			compatible = "arm,gic-400";
			reg = <0x01c81000 0x1000>,
			      <0x01c82000 0x2000>,
			      <0x01c84000 0x2000>,
			      <0x01c86000 0x2000>;
			interrupt-controller;
			#interrupt-cells = <3>;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
		};

		rtc: [email protected] {
			compatible = "allwinner,sun6i-a31-rtc";
			reg = <0x01f00000 0x54>;
			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
		};

		r_ccu: [email protected] {
			compatible = "allwinner,sun8i-h3-r-ccu";
			reg = <0x01f01400 0x100>;
			clocks = <&osc24M>, <&osc32k>, <&iosc>,
				 <&ccu 9>;
			clock-names = "hosc", "losc", "iosc", "pll-periph";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		codec_analog: [email protected] {
			compatible = "allwinner,sun8i-h3-codec-analog";
			reg = <0x01f015c0 0x4>;
		};

		ir: [email protected] {
			compatible = "allwinner,sun5i-a13-ir";
			clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
			clock-names = "apb", "ir";
			resets = <&r_ccu RST_APB0_IR>;
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			reg = <0x01f02000 0x40>;
			status = "disabled";
		};

		r_i2c: [email protected] {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x01f02400 0x400>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&r_i2c_pins>;
			clocks = <&r_ccu CLK_APB0_I2C>;
			clock-frequency = <100000>;
			resets = <&r_ccu RST_APB0_I2C>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		r_pio: [email protected] {
			compatible = "allwinner,sun8i-h3-r-pinctrl";
			reg = <0x01f02c00 0x400>;
			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <3>;
			interrupt-controller;
			#interrupt-cells = <3>;

			ir_pins_a: [email protected] {
				pins = "PL11";
				function = "s_cir_rx";
			};

			r_i2c_pins: r-i2c {
				pins = "PL0", "PL1";
				function = "s_i2c";
			};
		};
	};
};
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