/*
* Copyright (C) 2015 Jens Kuske <[email protected]>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "sunxi-h3-h5.dtsi"
#include <dt-bindings/thermal/thermal.h>
/ {
cpu_opp_table: opp_table {
compatible = "operating-points-v2";
opp-shared;
[email protected] {
opp-hz = /bits/ 64 <240000000>;
opp-microvolt = <980000 980000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <480000000>;
opp-microvolt = <980000 980000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <648000000>;
opp-microvolt = <1000000 1000000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1020000 1020000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <912000000>;
opp-microvolt = <1040000 1040000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <960000000>;
opp-microvolt = <1080000 1080000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1140000 1140000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <1104000000>;
opp-microvolt = <1180000 1180000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1240000 1240000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
[email protected] {
opp-hz = /bits/ 64 <1296000000>;
opp-microvolt = <1320000 1320000 1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: [email protected] {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <®_cpu_fallback>;
#cooling-cells = <2>;
};
[email protected] {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
operating-points-v2 = <&cpu_opp_table>;
};
[email protected] {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <2>;
operating-points-v2 = <&cpu_opp_table>;
};
[email protected] {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <3>;
operating-points-v2 = <&cpu_opp_table>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&ths>;
};
soc {
ths: [email protected] {
compatible = "allwinner,sun8i-h3-ths";
reg = <0x01c25000 0x100>;
clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_THS>;
#thermal-sensor-cells = <0>;
#io-channel-cells = <0>;
};
};
thermal-zones {
cpu-thermal {
/* milliseconds */
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&ths>;
trips {
cpu_warm: cpu_warm {
temperature = <65000>;
hysteresis = <2000>;
type = "passive";
};
cpu_hot_pre: cpu_hot_pre {
temperature = <70000>;
hysteresis = <2000>;
type = "passive";
};
cpu_hot: cpu_hot {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_very_hot_pre: cpu_very_hot_pre {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_very_hot: cpu_very_hot {
temperature = <90000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
temperature = <105000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
cpu_warm_limit_cpu {
trip = <&cpu_warm>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>;
};
cpu_hot_pre_limit_cpu {
trip = <&cpu_hot_pre>;
cooling-device = <&cpu0 2 3>;
};
cpu_hot_limit_cpu {
trip = <&cpu_hot>;
cooling-device = <&cpu0 3 4>;
};
cpu_very_hot_pre_limit_cpu {
trip = <&cpu_very_hot>;
cooling-device = <&cpu0 5 6>;
};
cpu_very_hot_limit_cpu {
trip = <&cpu_very_hot>;
cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>;
};
};
};
};
soc {
mali: [email protected] {
compatible = "allwinner,sun8i-h3-mali",
"allwinner,sun7i-a20-mali", "arm,mali-400";
reg = <0x01c40000 0x10000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gp",
"gpmmu",
"pp0",
"ppmmu0",
"pp1",
"ppmmu1",
"pmu";
clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
clock-names = "bus", "core";
resets = <&ccu RST_BUS_GPU>;
memory-region = <&cma>;
assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <384000000>;
};
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
cma: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x4000000>;
alignment = <0x2000>;
linux,cma-default;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
reg_cpu_fallback: reg_cpu_fallback {
compatible = "regulator-fixed";
regulator-name = "vdd-cpux-dummy";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
};
&ccu {
compatible = "allwinner,sun8i-h3-ccu";
};
&display_clocks {
compatible = "allwinner,sun8i-a83t-de2-clk";
};
&mixer1 {
resets = <&display_clocks RST_WB>;
};
&mmc0 {
compatible = "allwinner,sun7i-a20-mmc";
clocks = <&ccu CLK_BUS_MMC0>,
<&ccu CLK_MMC0>,
<&ccu CLK_MMC0_OUTPUT>,
<&ccu CLK_MMC0_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
};
&mmc1 {
compatible = "allwinner,sun7i-a20-mmc";
clocks = <&ccu CLK_BUS_MMC1>,
<&ccu CLK_MMC1>,
<&ccu CLK_MMC1_OUTPUT>,
<&ccu CLK_MMC1_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
};
&mmc2 {
compatible = "allwinner,sun7i-a20-mmc";
clocks = <&ccu CLK_BUS_MMC2>,
<&ccu CLK_MMC2>,
<&ccu CLK_MMC2_OUTPUT>,
<&ccu CLK_MMC2_SAMPLE>;
clock-names = "ahb",
"mmc",
"output",
"sample";
};
&pio {
compatible = "allwinner,sun8i-h3-pinctrl";
};
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